Monday, August 2, 2021

AMBA Bus Architecture & Protocol Understanding - Part#3

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There are 2 basic reasons why AXI may be faster: 1) Simplex Vs Duplex Transfers AXI has completely independent channels for read/write, wh...

AMBA Bus Architecture & Protocol Understanding - Part#1

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Following diagram illustrates AMBA evolution of protocols along with the SOC design trends in industry. AMBA 1 specification (First version)...

Power Aware Clock Domain Crossing

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Chief Aspects of Power Management : · Power Shut-off · Isolation · Retention · Corruption · Multiple Voltages ...

Design a Circuit for Retention SR Flip-Flop/Latch

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SR Retention Flip-Flop/Latch : - Lets have a look at a normal SR Flip Flop and Latch as below - ...
Saturday, July 31, 2021

Unified Power Format (UPF) Design - key Points

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1) Do we need any isolation strategy between ON - to - OFF (Standby) Block ? - Generally the isolation is required between OFF - to ON ...

Fundamentals of LINT

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Lint : - A Static analysis of code (e.g HDL) based on a series of rules and guidelines that reflect good coding practices, common er...

Fundamentals of Isolation Cells in Low Power VLSI Design

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In Multi Voltage VLSI Design, isolation cells play an important role in the modern VLSI world. Requirement : Lets have a look at the below...
Thursday, July 29, 2021

Digital Circuit Design - Problem#5

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Problem: Design a digital circuit which can generate a pulse which is high for 16 clock cycles and then goes low (Active High Reset Signal)a...
2 comments:

Digital Circuit Design - Problem#4

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Problem : Design a digital logic circuit to generate a reset pulse which is low for 16 clock cycles (Active Low Reset Generation) as shown i...

Digital Circuit Design - Problem#3

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Problem : Design a digital logic circuit to generate a stick bit as shown in the below waveform. The circuit takes an input as I/P and runs ...
Wednesday, July 28, 2021

Digital Circuit Design - Problem#2

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Problem : Design a black box circuit shown below whose input clock and output relationship is shown in below waveform. Solutio...

Digital Circuit Design - Problem#1

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Problem : Design a digital circuit as depicted in below block diagram which takes DIN as an input and runs at a clock speed of CLK and gener...
Tuesday, July 27, 2021

Verilog HDL Examples - Design of an Event Detector (Circuit Design)

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Problem : Design a circuit which detects and event (for one clock cycle) whenever there is a change (Either rising edge or falling edge)in t...
Monday, July 26, 2021

Tic-Tac-Toe Game Design Using Python

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And here comes some fun in the time when we all are locked inside our homes because of this COVID-19 pandemic ( 05/25/2020) . I am going to...

BlackJack Game Design Using Python

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CASINO !!! Yes , You imagined Rightly. Let's see how in couple of minutes you can develop your own Black Jack Game using Python Scripti...