AMBA Bus Architecture & Protocol Understanding - Part#3

There are 2 basic reasons why AXI may be faster: 1) Simplex Vs Duplex Transfers AXI has completely independent channels for read/write, which enables full duplex mode of data transportation. That is to say read and writes can take place simultaneously, giving 2x boost over AHB in any circumstances....

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AMBA Bus Architecture & Protocol Understanding - Part#1

Following diagram illustrates AMBA evolution of protocols along with the SOC design trends in industry.AMBA 1 specification (First version) defines two buses/interfaces- 1) Advanced System Bus (ASB) 2) Advanced Peripheral Bus (APB) AMBA 2 specification defines three buses/interfaces: 1) Advanced High-performance...

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Power Aware Clock Domain Crossing

Chief Aspects of Power Management : · Power Shut-off · Isolation · Retention · Corruption · Multiple Voltages · Level shifters Note: Leakage Power Reduction is Key in Low-Power Design Power Network Instrumentation - · Presence of power network may impact CDC...

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Design a Circuit for Retention SR Flip-Flop/Latch

SR Retention Flip-Flop/Latch : - Lets have a look at a normal SR Flip Flop and Latch as below - Figure#1 : SR Flip-Flop Figure#2 : SR Latch...

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