Introduction:-
During Desktop PC design era VLSI design efforts were mainly focused on optimizing speed to realize computationally intensive real time functions such as video compressing , graphics, gaming etc. While these solutions have addressed the real time issues still the increasing demand of portable operations where the mobile needs to pack all these functions without operating much power is unaddressed. The strict limitation on power dissipation in portable electronics applications such as smart phones and tablet computers must be met by the VLSI chip designer while still meeting the computational requirements. Hence, the most important factor while designing SOC for portable devices is "Keep the Power Consumption MINIMUM!!!’
Please download the file below for detailed concepts used for lowering power consumption in SoC Design. Low Power VLSI Design
Note - This article and the attached "Low Power VLSI Design" file is under the further improvements and review and will be updated periodically based on the feedback received on this topic.
I welcome your feedback , suggestions and corrections if any!!! - Happy Learning :)
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