Data-To-Data [Non-Sequential] Timing Checks
Data To Data Timing Checks :
- Setup and hold checks between two data pins (neither of these is defined as a clock)
- Also referred as Non-Sequential Constraints
- One data pin is the constraint pin , like a data pin of a flop and the second pin is the related pin which acts like a clock pin of a flop
- Below is the circuit diagram -
- This check is useful in a design where it may be necessary to provide specific arrival times of one signal with respect to other
- The Data-To-Data setup check is performed on the same clock edge as the launch edge
- Hence, this check is also known as zero-cycle check or same-cycle check
- Specifying Data-To-Data or Non-Sequential Check - Constrains can be defined in the timing library (.lib model) for a cell or can be set interactively using the set_data_check command in SDC
1) Non-Sequential check defined in the timing library -
pin ( D1 ) {
direction : input;
timing ( )
related_pin : “D2";
timing_type : non_seq_setup_rising;
...
timing ( )
related_pin : “D2";
timing_type : non_seq_hold_falling;
2) Data-To-Data Check defined by SDC Command -
set_data_check –rise_from D2 –to D1 –setup <x> set_data_check –fall_from D2 –to D1 –hold <y>
- if signals are coming from different clock domains -
set_data_check –rise_from D2 –to D1 –setup <x> -clock clockA
set_data_check –fall_from D2 –to D1 –hold <y> -clock clockA
Note : 'x' and 'y ' are setup and hold time values
Difference between Non-Sequential Check and Data-To-Data Check -
1) The setup and hold values are obtained from the timing library for Non-Sequential check where the setup and hold timing models are described. In a Data-To-Data check only a single value can be specified for the setup and hold check.
2) Non-Sequential checks in .lib are more accurate since it is sensitive to the slew of constrained and related pin
3) Non-Sequential check can only be applied to the pins of a cell, whereas a Data-To-Data check can be applied to any two arbitrary pins in a design
Note : In case Data -To-Data checks are specified through the library as well as with the set_data_check command interactively, then the value specified by set_data_check will be used for the Data-To-Data check.
Example :
set_data_check -from D2 -to D1 -setup 2.1
set_data_check -from D2 -to D1 -hold 1.5
- Setup data check implies that D1 should arrive at-least 2.1ns prior to the edge of the related pin D2 , otherwise it is a Data-To-Data setup check violation.
- Hold data check specifies that D1 should arrive at-least 1.5ns after D2. If the constrained signal arrive earlier than this specification, then it is a Data-To-Data hold check violation.
------------------------------------------------------Happy Learning------------------------------------
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