Unified Power Format (UPF) Design - key Points

1) Do we need any isolation strategy between ON - to - OFF (Standby) Block ?

- Generally the isolation is required between OFF - to ON Block but in some cases it is recommended to use isolation between ON - to -OFF domain as well.

- Normally the isolation strategy between OFF - to - ON is called as Parking

- This kind of strategy is required for some special kind of signals which have multiple loads in the OFF (Standby) domain, for example - RESET/CLK

- This is to insure that the RESET/CLK do not toggle when the domain is in OFF state

- This prevents switching of many sequential elements in the OFF domain and hence helps in reducing the power consumption

2) What is the basic Low Power Sequence followed in modern VLSI Design ?

Below is the basic sequence of Low Power Entry/Exit

- Save the retention register outputs

- Assert the isolation control signals ( Enable the isolation)

- Enable Clock Gating

- Apply the Power Gating /Shutdown the Power for Specific Blocks of Interest)

- Wait for the specific time/event (example - interrupt)to exit the Low Power State

- Remove the Power Gating/Switch ON the Power Domain

- Restore the retention register values

- Un-Gate the Clock

- Release isolation signals

3) What are the benefits of having ELS (Enable Level Shifter) Cells , if we have both Isolation and Level Shifter standalone cells ?

- They are combinedly designed in such a way that they consume less area (Area Efficient Design)

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Fundamentals of Isolation Cells in Low Power VLSI Design

In Multi Voltage VLSI Design, isolation cells play an important role in the modern VLSI world.


Requirement : Lets have a look at the below diagram -



- Lets assume VDDA voltage domain is always ON and VDDB voltage domain can go ON or OFF based on the certain design requirements ( To minimize the power consumption of the whole design)

- When VDDB domain is OFF , the outputs of all the gates of this domain are at unpredictable state.

- Since , some of the gates of VDDB domain might be driving some logic in VDDA domain (Which is always ON) but since VDDB domain signals are at unknown state (X) and they might corrupt the logic in VDDA domain and eventually the VDDA domain functionality gets corrupted

- To avoid such scenario , we need to isolate the signals going from VDDB(OFF) to VDDA(ON) domain by the use of nothing but called as isolation cells

- By using isolation cells we will clamp the respective logic to a proper value (0 or 1 or Latch )


Isolation cells :

- These are simple logic gates which is used to pull-up (logic '1'), pull-down (logic '0' ) a logic node when the logic node is supposed to get an invalid logic value ( Unknown Voltage)

Clamp to Zero (Pull Down) Isolation Cell :

- AND Gate based Clamp0 Isolation Cell -




Function: X = (A * EN)



- NOR Gate Based Clamp0 Isolation Cell - This type of cells comes with an inverted logic input A. These are useful in the cases where isolation cell is placed in OFF domain itself (VDDB in this case). They do not require and power supply to pull down the node as they are already sitting in OFF domain and power is OFF


Clamp to One (Pull Up) Isolation Cell -

- OR Gate Based Clamp1 Isolation Cell -





Function : X = (A + EN0)


Latch Type Isolation Cell -









Key Points :

- Only single supply is required for NOR type Pull Down isolation cells.

- To hold the value , Latch type isolation cells must required dual supply

- AND Based / OR Based , Pull Down/Pull Up isolation cells can have dual supply. They can be placed in OFF domain with ON supply



----------------------------------------------------Happy Learning--------------------------------------

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