Unified Power Format (UPF) Design - key Points

1) Do we need any isolation strategy between ON - to - OFF (Standby) Block ?

- Generally the isolation is required between OFF - to ON Block but in some cases it is recommended to use isolation between ON - to -OFF domain as well.

- Normally the isolation strategy between OFF - to - ON is called as Parking

- This kind of strategy is required for some special kind of signals which have multiple loads in the OFF (Standby) domain, for example - RESET/CLK

- This is to insure that the RESET/CLK do not toggle when the domain is in OFF state

- This prevents switching of many sequential elements in the OFF domain and hence helps in reducing the power consumption

2) What is the basic Low Power Sequence followed in modern VLSI Design ?

Below is the basic sequence of Low Power Entry/Exit

- Save the retention register outputs

- Assert the isolation control signals ( Enable the isolation)

- Enable Clock Gating

- Apply the Power Gating /Shutdown the Power for Specific Blocks of Interest)

- Wait for the specific time/event (example - interrupt)to exit the Low Power State

- Remove the Power Gating/Switch ON the Power Domain

- Restore the retention register values

- Un-Gate the Clock

- Release isolation signals

3) What are the benefits of having ELS (Enable Level Shifter) Cells , if we have both Isolation and Level Shifter standalone cells ?

- They are combinedly designed in such a way that they consume less area (Area Efficient Design)