Common RTL Issues Causing Functional Failures - Part#4

3) X Generation :

Arrays are often used in RTL code. When the array range is defined, the array must be always accessed within the given range. In a complex design, often arrays are accessed at a variable index, where the index is a complex expression. Improperly designed index logic can go out of bound causing chip failure.

The following RTL code illustrates a case of array bound violation when the counter, “count”, reaches the value 2.

module test (out1, out2, in1, in2, clk, reset);
output out1, out2;
input clk, reset;
input [2:0] in1, in2;
reg [2:0] out2;
reg [1:0] count;
assign out1=in1[count+1];
always @(posedge clk)
begin
if(reset == 0) count= 0;
else if(count == 2'b10) count = 0;
else count=count+1;
end
always
out2[count+1]=in2[count];
endmodule

Designers must verify that no arrays in the RTL are accessed out of defined range for the array.

Tristate buses can also result in Xs in the design. In tristate buses, multiple tristate gates with enables drive the same net. For the buses to function correctly, one and only one enable must be on at a time. Otherwise, either the bus will have no drivers or it will be multi-driven. Designers must verify that all buses in their design have one and only one driver at all times.

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