Bluetooth Low Energy - Link Layer Hardware Design : Architecture Overview

Link Layer Hardware Architecture :

Lets have a look at the complete Bluetooth Low Energy (BLE) Stack Diagram below. Here, Application and Host of the BLE Stack are Software/Firmware component while Controller is a Hardware component. We will be focusing on the implementation of Link Layer (LL) subcomponent of the controller hardware in this series of blog post.





Figure#1 : BLE Stack Block Diagram

Now, Lets see the various sub-components of Link Layer Hardware as depicted in the below block diagram. We will be discussing each and every component in details throughout this blog series and how they can be designed/implemented using HDL.

Figure#2 : Link Layer Hardware Architecture Diagram


The main functionality of Bluetooth Low Energy Link Layer Hardware includes -

- Control and manage all advertising procedures of all types of advertising packets

- Manages scan procedures including passive and active scanning

- Manages whitelist and duplicate filtering polices of BLE Stack

- Manages and controls connection procedures both as a Master and a Slave

- Link Sustenance (After a BLE connection is established between a Master and Slave)

- Controls and manages Link supervision timeout

- Manages Connection update and channel map update procedures

- Transmission and Re-transmission of BLE packets

- Acknowledgement and flow control

- Bit processing of packets (CRC, data whitening )

- Framing and de-framing of packets

- Supports and interface to processor bus for updating LL Hardware registers

- Support for various power saving modes for power optimized hardware implementation

- Supports for data encryption/decryption engines

Continued - - -

Happy Learning !!!