Digital Circuit Design - Problem#2



Problem : Design a black box circuit shown below whose input clock and output relationship is shown in below waveform.






Solution :
- Lets have a look at below circuit diagram -




- Now lets see how the waveform looks like for this circuit -





Key Points :


- Negative edge triggered flip -flop alters the output by half clock cycle
- Flip-flop can generate an output with the frequency half of its clock frequency




----------------------------------------------------Happy Learning---------------------------------------




Comments

Popular posts from this blog

Verilog HDL Examples - FIFO Design - Asynchronous FIFOs

Data-To-Data [Non-Sequential] Timing Checks

Fundamentals of Isolation Cells in Low Power VLSI Design