System Verilog Assertions - Consecutive Repetition

Consecutive Repetition :

- Repeated, consecutive sequences can be defined using [*N]

- Syntax : SEQ[*N]; SEQ, repeated N times

- Example : A is never low for more than 4 cycles






property CONSECUTIVE_REPET;

@(negedge CLK) !A[*4] |=> A;

endproperty

assert property (CONSECUTIVE_REPET);


Consecutive Repetition with Ranges :

- Syntax : SEQ[*min : max] ; SEQ will repeat from min to max times

- Example : A is low for 2 to 4 cycles only






property CONSECUTIVE_REPET_RANGE;

@(negedge CLK) A ##1 ~A |=> !A[*1:3] ##1 A;

endproperty

assert property (CONSECUTIVE_REPET_RANGE);

Consecutive Repetition - Special Range Cases :

- Lower bound can be 0

- No minimum number of repetition , sequence may be absent

- Example :

A ##1 B[*0:2] ##1C;

- Possible Sequences - (A##1 C), (A ##1B ##1 C), (A ##1 B ##1 B ##1 C)

- Lower bound can be infinity ($)

- No maximum number of repetition , sequence might never end

- Example :

A[*2:$] ##1 B

- Possible Sequences - (A ##1 A ##1 B) , (A ##1 A ##1 A ---)



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