Tuesday, August 3, 2021

Cortex Mx Processor Operating System (OS) Friendly Features



The Cortex-M series of processor supports OS friendly features like, Shadowed Stack Pointer, SysTick Timer, SVC and PendSV exception. Lets discuss some key points of each of the as below -

Use of Shadowed Stack Pointer:

- Physically two stack pointers are there in Cortex M3/M4 processor

- The SP(R13), which is called stack pointer, points to the currently selected stack pointer

- Value of SPSEL bit in the CONTROL register determines which stack is currently active and used





- When kernel runs, it uses MSP to track its stack space. When kernel scheduler makes Task A to run, it changes the processor stack selection to PSP and loads the Task A’s previous stack pointer value to PSP to make Task A resume from where it was left before. The Kernel should keep track of all the tasks stack pointer values and load it appropriately into PSP when it schedules a particular task to run.

SVC Exception:

- SVC stands for supervisory call

- This is triggered by SVC instruction

- The SVC handler will execute right after the SVC instruction (No delay!! Unless a high priority exception arrives at the same time)

- Advantages of SVC Exception: Kernel will not allow any application to directly open the hardware, the application has to ask the service using SVC instruction with appropriate service number.




Method to Trigger SVC Exception:

There are two ways –

1) Direct execution of SVC instruction with an immediate value

- Example: SVC 0x04 in assembly

- Use SVC instruction is very efficient in terms of latency

2) Setting the exception pending bit in “System Handler Control and State Register”

- This method is not preferred and there is no reason why to use it

How to Extract the SVC Number:

- When SVC instruction is executed, the associated immediate value (Service Number) will not be passed to SVC Exception Handler

- The SVC handler need to extract the number by using the PC value which was stored on to the stack, prior coming to the exception handler












PendSV Exception:

- In OS designs, we need to switch between different tasks to support multitasking. This is typically called context switching.

- Context switching is usually carried out in the PendSV exception handler.

- It is exception type 14 and has a programmable priority level.

- It is basically set to lowest priority level possible.

- This exception is triggered by setting its pending status by writing to the “Interrupt Control and State Register”.

Typical Use of PendSV:

- Typically, this exception is triggered inside a higher priority exception handler and it gets executed when the higher priority handler finishes.

- Using this characteristic, we can schedule the PendSV exception handler to be executed after all the other interrupt processing tasks are done.

- This is very useful for a context switching operation, which is a key operation in various OS designs.








PendSV In Context Switching:

- In typical OS design, the context switching operation is carried out inside the PendSV exception handler.

- Using PendSV in context switching will be more efficient in an interrupt noisy environment.

- In an interrupt noisy environment, we need to delay the context switching until all the IRQ are executed.

- PendSV delays the context switching until processor is free from other exceptions.

- To do this, the PendSV is programmed as the lowest priority exception.

- If the OS decides that the context switching is needed, it sets the pending status of the PendSV and carries out the context switching within the PendSV exception.






- At point 7, the processor cannot switch to thread mode because the ISR is still unfinished and that is why we should not do the context switch in Systick exception handler.

Offloading Interrupt Processing using PendSV:

- If a higher priority handlers doing time consuming work, then the other lower priority interrupts will suffer and systems responsiveness may reduce.

- Typically, interrupts are serviced in 2 halves.

1) The first half is the time critical part that needs to be executed as a part of ISR.

2) The second half is called bottom half, is basically delayed execution where rest of the time-consuming work will be done.

- So, PendSV can be used in these cases, to handle the second half execution by triggering it in the first half.




-----------------------------------------------Happy Learning ------------------------------------------




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