System Verilog - Key Points
In this blog post, I am collecting various key information, kind of nitty-gritties of System Verilog.
1. System Verilog Shallow Copy –
Note: In shallow copy, all of the variables are copied across: integers, strings, instance handles, etc. Please note that objects will not be copied, only their handles will be copied. To perform the full or deep copy, the custom method can be added.
System Verilog Deep Copy-
Note: In the custom method, a new object is created, all the class properties will be copied to a new handle and the new handle will be returned.
3. System Verilog Clone- clone() means construct followed by a call to copy(). clone() is virtual so that we can construct the same object type as the one we started with. clone() calls copy() to perform a deep copy of the object type we just created. The copy() method by itself just copies class member values from one object to another. Normally, the copy() method only copies the class members for the current class type, then it calls super.copy() to copy the class members of the base class.
4. The class scope resolution operator enables the following: -
· Access to static public members (methods and class properties) from outside the class hierarchy.
· Access to public or protected class members of a superclass from within the derived classes.
· Access to type declarations and enumeration named constants declared inside the class from outside the class hierarchy or from within derived classes.
5. It is never legal to directly assign a superclass variable to a variable of one of its subclasses. However, it is legal to assign a superclass handle to a subclass variable if the superclass handle refers to an object of the given subclass using $cast() dynamic method.
6. Semaphore – we can put back keys even if you didn’t get them. (Semaphore Limitation)
7. Non-blocking event trigger - Nonblocking events are triggered using the ->> operator. The effect of the ->> operator is that the statement executes without blocking (Non- blocking means a separate thread is created and will run concurrently) and it creates a nonblocking assign update event in the time in which the delay control expires or the event control occurs.
8. Mailbox – A mailbox holds handle and not object. So, even though we are putting handle every time put() method is called but it is pointing to the same memory and hence the receiving thread might get the same value at every get() operation.
9. Hierarchical paths are not synthesizable (Not used in Design Modules only intended to be used in test bench)
10. Always explicitly declare all vectors in a netlist. (`efault_nettype none) – To enable -`default_nettype wire.
11. Use 2 state types for for-loop iterator variables or for verification class properties that will have constraint random values generated. Use 4 state types in hardware modes or in test bench signals that drive/monitor the design ports.
12. It is illegal for a static method to access automatic (non – static) members or to the special handle called “this ”, as in this.name or this.age.
13. Static method can be called by using either an object handle (just as any other method) or by scope resolution operator.
14. The static property is shared between all instances of that class. Memory for static properties is allocated at the start of simulation.
15. A messaging class could have a static method to print the total numbers of errors.
16. All constraints in an object (of class) [ even spread across a base and extended] are solved concurrently and bidirectionally.
17. Constraints can be specified as static. Static constraints are shared by all instances of that class.
18. Constraint_mode (0/1), rand_mode(0/1) used to enable/disable constraint and variable randomization.
19. SV obeys a soft constraint until it conflicts with a regular constraint (soft constraint is dropped in this case)
QuestaSim Trivia:-
A) Use Dataflow Window to see the graphical representation of the design (View -> Dataflow, drag the DUT instance from the SIM window into the Dataflow Window)
B) To edit the source files in QuestaSim source window, right click in the source window and uncheck the “Read Only” option.
C) Compile the faulty version of the design with the lint switch to find errors.
% vlog -lint -f file.f
-------Happy Learning------
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